Korea's DeepX tapes out second-gen DX-M2 AI chip with Samsung's LPDDR5x PIM tech at 5 watts

South Korean edge AI chip startup DeepX has taped out its second-generation AI accelerator, the DX-M2, using Samsung Memory's LPDDR5x processor-in-memory (PIM) technology, aiming to let robots, drones and other edge devices run large language models directly at just 5 watts. EE Times reported on November 9 that the DX-M2 is designed to run models of 20 billion to 100 billion parameters — about 3 billion to 20 billion active parameters — at 10 to 30 tokens per second.

Memory bandwidth triples; simulations project a 6.7x speedup

Compared with the first-generation DX-M1, the DX-M2 triples memory bandwidth from 50 GB/s to 150 GB/s; its neural processing unit has doubled its power efficiency through design improvements, and moving to a 2-nanometre process node doubled it again, reaching 80 TOPS. DeepX's simulations show that offloading general matrix-vector multiplication (GEMV) operations into the LPDDR5x-PIM memory raises tokens per second for the Llama3.1-8B model to 6.7 times the DX-M2 alone — but founder and CEO Lokwon Kim noted that the 6.7x performance needs 2.7 times the overall power, with about a twofold uplift available within the same power envelope. The company has spent a year and a half working on the technology with Samsung Memory and has received LPDDR5x PIM samples, which it is testing in-house.

Targeting robots, AI PCs and cars

The DX-M2 targets robots, AI PCs, cars and internet-of-things devices. DeepX is working with Taiwanese manufacturers on AI PCs, while robotics customers typically start on Nvidia's Thor platform and look for lower-power alternatives because of heat and power constraints; Hyundai Motor Group's Robotics Lab already uses the DX-M1 in its robotics platform. The company is also working with Intel to integrate OpenVINO into the DeepX software development kit, and is in talks with AMD on a robotics platform based on its Kria reference board.

Samples in March 2027; third generation aimed at 2028

Engineering samples of the DX-M2 are expected in March 2027, with mass production targeted for autumn 2027. A third generation, the DX-M3, is planned for 2028 with a chiplet-based design targeting 1 ePOPS (INT8) and support for LPDDR6 PIM, aimed at carmakers and humanoid robotics. Kim said AI compute will become more distributed as efficiency improves, and that running 100-billion-parameter models on devices could cut AI data-centre traffic by more than 80 percent. The first-generation DX-M1 is in mass production, and the company says it has more than 100 purchase orders.