Altera Launches Agilex 2X Programmable-Chip Portfolio, Claiming 1.8x Performance per Watt for Flagship Agilex 27

US programmable-chip maker Altera on October 28 announced Agilex 2X, a portfolio of FPGA (field-programmable gate array) and SoC (system-on-chip) devices for next-generation intelligent systems, spanning digital AI infrastructure in data centres to robotics, communications networks, aerospace and defence, and physical AI at the edge.

What the first family, Agilex 27, offers

The first family is the high-performance Agilex 27. Its headline feature is HyperFlow, a new full-chip distributed data network that Altera says can move data at multi-terabit-per-second rates over a dedicated network, without consuming programmable logic resources or adding routing congestion, leaving the logic free for processing. As an example, traffic arriving through a 1.6TbE Ethernet port can enter via hardened I/O and be carried across the chip by HyperFlow.

Agilex 27 also supports 800GbE and 1.6TbE Ethernet, DDR5, LPDDR4, LPDDR5X and LPDDR6 memory controllers, UCIe interconnect, crypto acceleration, and Arm Cortex-A720 and Cortex-A520 cores. The company claims a 1.8-times performance-per-watt improvement over the previous-generation Agilex 7, thanks to third-generation HyperFlex registers — a vendor claim that still awaits verification on real samples.

One portfolio, four families

Agilex 2X spans four families: flagship Agilex 27 for high-bandwidth, high-throughput systems; mid-range Agilex 25 for video processing, drones and sensors; Agilex 23 for robotics, industrial automation and automotive systems; and Agilex 22 for control, motor, security and interface applications. Agilex 22 is FPGA-only, while Agilex 23 adds SoC options.

On software, the portfolio is supported by Quartus Prime 26.3, with QuartusIQ, an AI assistant for hardware design tasks. Altera says engineering samples of Agilex 27 are expected in the second half of 2027, so customers still face a wait before they can test the silicon.

The company context

Altera describes itself as the largest pure-play FPGA provider. Intel sold a 51% stake in Altera to Silver Lake in April 2025, and reports say Altera confidentially filed a draft IPO registration with the US Securities and Exchange Commission in September 2026, targeting a raise of more than $2 billion — a confidential filing does not guarantee a completed offering, which could still be delayed or withdrawn.

For engineers, the point of this launch is less any single specification than Altera's attempt to cover AI workloads from cloud to edge on one scalable platform — provided samples arrive on schedule and the power and bandwidth claims hold up in real designs.