Tesla unveils new chip roadmap, rebrands AI line as SI; SI6 claimed to deliver 80x the compute of AI4

Tesla on Friday (November 6) disclosed a revamped roadmap for its in-house accelerator chips, renaming the AI4, AI5 and AI6 generations SI4, SI5 and SI6, and claiming the sixth-generation SI6 will deliver 80 times the compute of the current AI4. Its Dojo 3 training chip will also switch to a new multi-chiplet architecture with stacked high-bandwidth memory (HBM). According to Tom's Hardware, the move is Tesla's latest step under its "super intelligence" branding push.

From AI to SI: a super-intelligence signal

The renaming is itself a signal, the report says: moving from AI to SI reframes the silicon line as compute infrastructure for training-scale ambitions rather than driver-assistance chips in cars. SI4, SI5 and SI6 form one continuous generation ladder, with the 80x compute claim at the top setting a milestone the whole programme can be tracked against. But the report also cautions that SI6 itself is still years away, and whether the claim holds will ultimately be judged by the silicon that ships.

Dojo 3 pivots to chiplets plus HBM

The training side is pivoting too. Dojo 3 (D3) will drop the earlier design's SRAM-centric architecture in favour of a multi-chiplet design with stacked HBM. Chiplets plus high-bandwidth memory is the direction the accelerator industry has converged on, so the move aligns Tesla's training hardware with the mainstream stack rather than persisting with a highly bespoke design. For training, memory bandwidth is often the real constraint, which is why the HBM detail matters as much as the chiplet count.

Dojo restarted a year after being disbanded; nine-month design cadence

The Dojo programme itself has been through several turns. Tesla disbanded the Dojo team in August 2025 and shelved the D2 chip, with chief executive Elon Musk calling D2 an "evolutionary dead end". In January 2026, with the AI5 chip design progressing, Musk said Tesla would restart Dojo 3, adding that future supercomputer clusters would be built from large numbers of AI6 chips. He also set out a nine-month chip design cadence, three months faster than the roughly annual rhythm Nvidia and AMD currently work to. AI5 is made by TSMC and AI6 by Samsung under a US$16.5 billion deal; the AI5 design is nearly complete while AI6 is in its early stages. Musk has said AI6 will power the Optimus humanoid robot and data centres, while AI7 and Dojo 3 are aimed at space-based compute.

Beyond the claims, the silicon still has to land

Notably, the 80x figure is Tesla's claim and has not been independently verified, and the roadmap gives no production timetable for SI6. AI5 is expected to enter production by late 2026. For anyone tracking Tesla hardware, the real test is whether each SI generation lands on schedule in shipped cars and robots — that is where the claims get tested.

(Sources: Tom's Hardware, via DEV Community; Datacenter Dynamics, November 6, 2026.)