Qualcomm's Near-Memory HBC Silicon Passes Lab Validation; Dragonfly AI250 Sampling Due in Early 2027

Qualcomm said on November 2 that its first-generation High Bandwidth Compute (HBC) silicon has passed initial validation in its San Diego labs, a key step in its push into data-centre AI inference. HBC stacks low-power LPDDR memory dies directly on top of an active AI accelerator base die, bonded wafer-to-wafer, so computation happens close to memory and data movement is cut. The test sample used a two-layer DRAM stack; shipping products will use four layers. (Photo: file image of a Qualcomm data centre processor, not the HBC test sample.)

What the lab test covered: the full memory path and near-memory math

According to ServeTheHome and The Next Platform, Qualcomm used industry-standard automated test equipment to exercise the complete memory read-write path and near-memory computations at production-representative dimensions, using randomized weights and activations. Gerardo Giaretta, Qualcomm's vice-president and general manager of datacentre CPU and AI, described the physical advantage to journalists and analysts: data travels micrometres instead of millimetres, removing off-package transfer overhead for low-arithmetic-intensity inference work.

The 18x and 5x figures are Qualcomm's own claims, not independent benchmarks

Qualcomm claims first-generation HBC delivers up to 18 times the effective memory bandwidth of LPDDR5X and about five times the bandwidth per watt of projected HBM4 specifications. Those are the company's own estimates, based on measured silicon results normalized to target operating conditions and compared with published competing specifications — not independent benchmarks. WCCFtech notes the efficiency figure came in slightly below the 6x Qualcomm had projected earlier. Lab validation also says nothing yet about production yield or whole-model speed gains.

Next: AI250 sampling in early 2027, a rack with 38.6TB of memory

HBC will debut in the Dragonfly AI250 accelerator platform, expected to sample to enterprise and hyperscaler customers in the first half of 2027; a full liquid-cooled rack is claimed to offer 38.6TB of system memory and 7.4 petabytes per second of effective memory bandwidth. Qualcomm also plans its Oryon-based C1000 server CPU in 2027 and second-generation HBC in the Dragonfly AI300 in 2028. This is a development milestone, not a product launch — the real test comes with sampling, independent measurement and manufacturing ramp.

Sources: Qualcomm (2026-11-02), ServeTheHome, HotHardware, WCCFtech, Superpower Daily, The Next Platform.