TSMC advanced packaging prices reportedly set to rise up to 20% as AI chip demand strains CoWoS capacity

Prices for TSMC advanced packaging are reportedly on the way up. Taiwan's Commercial Times reported on October 27, citing supply-chain sources, that TSMC is preparing a new round of price increases for CoWoS (chip-on-wafer-on-substrate) packaging, estimated at 10% to 20% and up to 20% at the top end. Several overseas financial outlets carried the report the same day. TSMC itself has not officially announced an increase, so the figures remain reported market information, not a company decision.

Demand spreads beyond AI graphics processors

According to the report, demand for advanced packaging is no longer limited to graphics processors used in artificial intelligence. It has spread to server central processors and custom application-specific integrated circuits (ASICs), with unfilled orders still rising, while longer testing times for AI chips are pressing packaging and testing capacity at the same time. Some packaging delivery times have already lengthened, and customers are reported to be prioritising guaranteed delivery over price negotiation.

Equipment lead times stretch to eight months

Supply-chain sources cited in the report put equipment lead times at six to eight months, up from three to six months previously. Analyst estimates cited by the outlets put TSMC monthly CoWoS capacity above 130,000 wafers in 2026, targeting 200,000 in 2027, with expansion under way including the AP7 plant in Chiayi, AP8 and AP6 in Tainan, and the AP1 advanced packaging plant in the United States, planned to start production in 2028.

Wafer prices also reported to rise in 2027

The same report also said TSMC wafer manufacturing prices are reported to rise 3% to 6% from January 2027, with 2-nanometre and 3-nanometre processes facing the largest increases. Packaging and wafer manufacturing are separate lines on the cost bill, so the final cost increase for a customer using an advanced process plus CoWoS depends on how much each contributes. The report also cited TSMC chairman C.C. Wei saying at a recent earnings call that CoWoS remains customers' preferred choice, that five-times reticle-size packaging is in mass production, and that nine-times and 14-times solutions and CoPoS technology are under development.

If the increase goes ahead, the first to feel it would be AI chip makers such as Nvidia and AMD and the smartphone and computer chip supply chains that use advanced packaging. Until TSMC confirms anything, however, the size and timing of any increase remain market reports, and the real test will be the company announcement and actual customer quotations.